1. Field
Example embodiments relate to a method for forming a thin layer and a method of manufacturing a semiconductor device. Other example embodiments relate to a method of forming a thin layer including silicon nitride to ensure sufficient charge trapping sites and improved interface characteristics, and a method of manufacturing a charge trapping type non-volatile memory device using the method of forming the thin layer.
2. Description of the Related Art
Generally, non-volatile semiconductor memory devices are divided into floating gate type non-volatile memory devices and charge trapping type non-volatile memory devices in accordance with structures of unit memory cells thereof. The charge trapping type memory device may have a silicon oxide nitride oxide semiconductor (SONOS) structure, and thus the charge trapping type memory device may be referred to as an SONOS type non-volatile memory device.
In the floating gate type memory device, a unit memory cell may include a tunnel oxide layer formed on a semiconductor substrate, a floating gate, a dielectric layer and a control gate. Data may be stored into the floating gate as free charges are injected into the floating gate. As for the floating gate type memory device, the injected charges in the floating gate may be dissipated when some defects may occur in the tunnel oxide layer between the substrate and the floating gate. The tunnel oxide layer of the floating gate type memory device may have a sufficiently thick thickness. A relatively high driving voltage may be required when the floating gate type memory device includes the relatively thick tunnel oxide layer so that the peripheral circuit of the floating gate type memory device may be considerably complicated. The floating gate type memory device may not be relatively highly integrated.
In the SONOS type non-volatile memory device, the unit memory cell may include a tunnel oxide layer formed on the semiconductor substrate, a charge trapping layer having a multi-layered structure of a silicon nitride layer and a dielectric layer, and a single electrode formed on the charge trapping layer. Data may be stored into the SONOS type non-volatile memory device as charges are injected into charge trapping sites of the silicon nitride layer. The charges may be trapped in relatively deep level trapping sites of the silicon nitride layer such that the tunnel oxide layer may have a relatively thin thickness.
Because the silicon nitride layer may serve as a charge trapping layer in the SONOS type non-volatile memory device, electrical characteristics of the SONOS type non-volatile memory device may directly depend on properties of the silicon nitride layer. As for the SONOS type non-volatile memory device, a surface of the silicon nitride layer may be inevitably oxidized in successive thermal processes for manufacturing the SONOS type non-volatile memory device. When the silicon nitride layer is partially oxidized, silicon oxide may be generated between the silicon nitride layer and the dielectric layer. The dielectric layer may be relatively thick whereas a dielectric constant of the dielectric layer may decrease. The silicon nitride layer may have a reduced thickness because of a partial oxidation of the silicon nitride layer, and thus a bond strength between silicon and nitride in the silicon nitride layer may increase. The charge trapping sites in the silicon nitride layer may be considerably reduced, to thereby deteriorate a programming operation and an erasing operation of the SONOS type non-volatile memory device.
To settle the above-mentioned problems, a method for manufacturing a charge trapping type non-volatile memory device may be needed in which a silicon nitride layer serving as a charge trapping layer of the charge trapping type non-volatile memory device is not deteriorated in successive thermal processes while ensuring sufficient charge trapping sites of the silicon nitride layer.